Hardware

Disaggregated Chiplet Architectures Reshape Fab Strategies and IP Markets

By Reporting from New York

Disaggregated Chiplet Architectures Reshape Fab Strategies and IP Markets
Photo via Wikimedia Commons

NEW YORK — What happened

The semiconductor industry is rapidly embracing chiplet-based architectures, moving away from monolithic system-on-chip (SoC) designs for high-performance processors. This paradigm shift, where complex chips are built by combining multiple smaller, specialized 'chiplets' from different manufacturers, is fundamentally altering how chips are designed, manufactured, and sold. This trend is leading to the emergence of new 'fab-of-fabs' models and a burgeoning market for inter-chiplet communication standards and intellectual property (IP) blocks.

Why it matters

Moore's Law, which predicted the exponential growth in transistor density, is slowing down. Chiplets offer a way to continue performance improvements by mixing and matching the best-of-breed components (e.g., a CPU chiplet from one vendor, a GPU chiplet from another, a specialized AI accelerator chiplet from a third). This allows for greater customization, better yield management, and potentially lower costs for highly specialized applications. It also diversifies the supply chain and enables smaller players to contribute high-value IP without needing full-scale fab capabilities.

Deep dive

In a monolithic SoC, all components are fabricated on a single piece of silicon, which becomes increasingly expensive and difficult as feature sizes shrink. Chiplets break this down: different functional blocks (CPU cores, memory controllers, I/O, accelerators) are manufactured as individual, smaller chips, often at their optimal process node (e.g., CPU on 3nm, I/O on 12nm). These chiplets are then integrated onto a single package using advanced packaging technologies. This requires robust inter-chiplet communication standards (like UCIe – Universal Chiplet Interconnect Express) and sophisticated integration tools. The new 'fab-of-fabs' model refers to chip integrators who specialize in assembling these disparate chiplets, sourcing components from various foundries and IP providers, effectively becoming orchestrators of advanced silicon ecosystems.

Report check

Major players like Intel, AMD, and Nvidia have publicly committed to chiplet strategies, with several high-profile product announcements in 2025 and 2026 showcasing multi-chiplet designs. Industry analysts from Gartner and IDC project that over 50% of new high-performance computing (HPC) and AI server processors will utilize chiplet architectures by 2028. Reports also suggest a 20% year-over-year growth in chiplet-related IP licensing. While the overall trend is clear, the exact market share shifts and the speed of adoption across all segments are still evolving. Rumors of a new open-source chiplet design platform being backed by a consortium of Asian manufacturers are unconfirmed but point to the industry's direction.

Open questions

How quickly will industry-wide standards for chiplet interoperability mature, and will proprietary solutions hinder broader adoption? What are the security implications of integrating components from multiple, potentially unverified sources onto a single package? How will this impact the intellectual property landscape, and who will bear the ultimate responsibility for quality control and performance guarantees in these complex integrated systems? Will this lead to greater fragmentation or consolidation within the semiconductor manufacturing ecosystem?